May 2018 – KQ2Z

Contextual Electronics: CE Header Part 1 – building

The third CE project, and the first paid one, centers around a standardized header, intended for interoperability. CE provides a keyed design meant to carry common signals, and use it in the first exercise to connect a Teensy to a sensor board.

The Teensy, specifically the Teensy 3.2, isa small USB-based microcontroller board with an ARM 32 bit processor on it. It can be programmed using the Arduino IDE. The board has a fair number of pins, and I chose to populate them with female headers on the bottom. Not yet sure it was the best choice.

The first part of the project is the interface board. It has Teensy-compatible pins one one side, and the CE header on the other, thus allowing any CE header device to talk to the Teensy. I put male pins on the Teensy side, and female pins on the CE side.

The board has a jumper for selecting 3v3 or 5v on one of the CE header pins.

Here you can see the two boards together:

The final step of the design was the sensor board. This board carries a bunch of things – a digital serial-to-parallel buffer that lights up LEDs, a digital (i2c) temperature sensor, and an analog (resistive) light sensor. This was the most challenging part, as the goal was to fit a 1″ square design. I made it harder yet by using some different (larger) components than in the reference design. Some of the components are not yet populated, as I’m still trying to decide what to use.

All three boards stacked together:

Contextual Electronics

Did I mention lack of focus? Yet another program I’m following is the Contextual Electronics course. The focus here is very practical. It teaches KiCad, the free open source schematic and PCB design tool, and practical design skills.

This is a paid program, but the fees are quite reasonable and there’s tons of live support. The first few projects are free.

You can also get a Digilent Analog Discovery 2 at a discount price, which is a really nice piece of gear, especially if one doesn’t already have an oscilloscope. I do, and mostly got this for the logic analyzer capability.

I did the design for the first project (“Shine on you crazy KiCad”) but didn’t bother building it.

The second project, “Getting to Blinky 4.0” I built, for the SMD soldering practice, mostly.

DDaCA Lab 2

Lab 2 revolved around the seven segment displays available on the DE2 board. The project was to build a seven segment display decoder which takes as input a four-digit binary value (set with the switches on the DE2) and displays 0-F on one of the displays.

Again, the design was done graphically, but this was a much more complex circuit and got very repetitive to do this way. Good thing no one designs logic this way for real. On to Verilog in the next lab!

DDaCA Lab 1

The first lab of the program involved building a full adder. The adder is designed graphically, simulated, and then synthesized to the DE2.

The graphical design is straight forward if not very efficient:

Most of the effort went into getting all the computer to board connections correct. The first lab is detailed in how to do this, keep it handy!

Digital Design and Computer Architecture

Because I can’t focus on just one textbook at a time, I recently read Digital Design and Computer Architecture, ARM Edition, by Harris and Harris. Mostly, I wanted to learn about FPGAs. To that effect, I got lab materials (found under the “Companion Materials” in the link above) and bought myself an Altera DE2 board.

This is an older board, out of production, but easily found on eBay. This one was in mint condition with all of the accessories. It features a Cyclone II FPGA which is nice for two reasons – it’s still in production, and it’s one of the last FPGAs in production that doesn’t use a BGA footprint, making it actually usable in hobby projects.

Altera provides the free Quartus II software (Web Edition is the free version), but beware – to program a Cyclone II you need version 13.0.1 or earlier (though why go earlier I don’t know). This seems odd to me, as they still make the chip, but don’t support it in the current tool chain. The old versions can be downloaded from the Altera website.

I also needed one more file – the lab materials give a link to a file “DE2_pin_ assignments.csv” but, unfortunately, that link points to an on-campus only server at the author’s university. Still a google search found the same file elsewhere.

Another useful note on this board: I’ve been a fan of Bruce Land‘s videos from his Cornell microprocessor and FPGA classes. In the older version of the FPGA class, the one from 2011, he uses the same boards. I plan to attempt at least the first lab project from that lab.

Edit from 2024: The link above, to the Elsevier page, no longer works. The book itself can be found here: https://www.amazon.com/dp/0128000562/
Some of the supporting files and labs that had been on the Elsevier page can be found here: https://pages.hmc.edu/jspjut/class/s2015/e85/#

Lab 3: Diode Circuits (Part 1 – LC resonant circuit, 1/2 wave rectifier, full wave bridge rectifier

Did these a while ago, but didn’t get a chance to post them.

Not much to say about them, other than, again, paying attention to impedance matching and loading is key. 10:1, for this low frequency stuff. Can’t impedance match 1:1 like I’m used to with radio stuff.

3L.1.1 The LC resonant circuit worked as predicted, but I didn’t get any photos. A 0.01uF capacitor and 10mH inductor predicted a resonant frequency of 5kHz and the actual measured frequency was 4.85kHz. That’s 3% error, well within the 10% capacitor tolerances.

3L.1.2 The f3db values were found to be 5.18 and 4.59kHz, for an average delta-f of .3 kHz, giving a Q of 15.3.

3L.1.6 To get the ringing I had to change the current limit resistor from 100k to 10k. Otherwise, there just didn’t seem to be enough current to do this exercise well. Using the decay ringing to estimate Q I found about 3 cycles before the voltage dropped below 6%, for a Q value of 19. Probably close enough to the 15.3 above.

3L.2 The half-wave rectifier worked as expected. Vpeak was 10V, meaning the transformer was a little high (the rated 6.3Vrms of the transformer should have given me 8.9Vpeak).

3L.3 Full wave bridge rectifier was assembled on a breadboard, and, as predicted, I blew a pair of diodes before I got it right. I begin to dislike solderless bread boards more and more. But can’t exactly roll a custom PCB for each project. Once it was built right, it behaved as expected:

The full wave rectifier gave me a 9.3Vpeak, exactly consistent with one extra voltage drop.

3L.3.1 The ripple amplitude without filtering was the full 9.3V at 120Hz. Once a 15uF capacitor was added, it settled down to 1.52Vpp. Calculated ripple should have been 2.24Vpp. Not sure why that much discrepancy. Maybe stray capacitance in the breadboard? Stray inductance in the leads?

3L.3.2 To design a filter for 1Vpp ripple at 20mA current, I found I needed an R of 465Ohm and a C of 160uF. Built up, this system worked too well – actual ripple was about 840mV.

This makes sense, since the design rests on Assumptions 1 and 2 which err on the side of less ripple.